Q1. How is an 8 bit microprocessor different from a 32 or 64 bit one?
In a 8 bit up 8 bits of data are read at a time, in a 32 & 64 bit one 32 & 64 bits of data are read at a time.
Q2 What are the modes of data transfer in ups?
Types of data transfer modes are
1) Synchronous mode
2) Asynchronous mode
3) Interrupt driven mode
In Asynchronous mode the MPU initiates data transfer by requesting the device to get ready & then goes on checking its status. This is known as handshaking mode of data transfer.
Synchronous mode is used for devices whose timing characteristics are known. In a synchronous transmission, there are no START or STOP bits appended to the data stream, and there is no idle period. As with asynchronous transmission the data rates on receiving and transmitting have to be in sync. However, unlike the separate clocks used in an asynchronous transfer, the devices involved in a synchronous transmission are synchronizing off one common clock that does not start and stop with each new frame (and on some boards there may be an entirely separate clock line for the serial interface to coordinate the transfer of bits). In some synchronous serial interfaces, if there is no separate clock line, the clock signal may even be transmitted along with the data bits.
The universal asynchronous receiver-transmitter (UART) is an example of a serial interface that does asynchronous serial transmission, whereas serial peripheral interface (SPI) is an example of a synchronous serial interface.
In Interrupt driven mode an interrupt is generated on the Interrupt line. The Interrupt service subroutine saves the processor status on the stack, completes the data transfer with the IO responsible for interrupt, restores the processor status & returns to the original program.
Q3. What is the function of 8251 chip?
8251 is a serial interface chip. USART(Universal Synchronous Asynchronous Receiver Transmitter) . It accepts parallel data from the USART, converts it into serial form according to specified format. At the same time it receives serial data & converts it to parallel form for the MPU.
Q4. What are the features of RS232C?
It is a commonly used serial communication interface for binary data interchange. It is a single ended, bipolar voltage unterminated circuit. A single wire carries the signal
+3 to +25V – Logic 0
-3 to -25V – Logic 1
Voltage levels are not TTL compatible. This needs separate voltage supplies for level conversion from TTL to RS232C & vice versa. ±12V supplies are used to get a reasonable threshold between high & low logic levels. Single ended unterminated configuration is susceptible to all forms of EMI. RS232C allows data interchange over short distances upto 50 feet. In Controller chip for Rs232C to TTL & TTL to RS232C conversion are required (MC1488, MC1489)
The core of the RS-232 specification is called the RS-232 interface (see Figure 4.9). The RS-232 interface defines the details of the serial port and the signals, along with some additional circuitry that maps signals from a synchronous serial interface (such as SPI) or an asynchronous serial interface (such as UART) to the serial port and by extension to the I/O device itself. By defining the details of the serial port, RS-232 also defines the transmission medium, which is the serial cable. The same RS-232 interface must exist on both sides of a serial communication transmission (DTE and DCE or embedded board and I/O device), connected by an RS-232 serial cable, in order for this scheme to work.
Two DTE devices can interconnect to each other using an internal wiring variation on serial
cables called null modem serial cables. Since DTE devices transmit and receive data on the
same pins, these null modem pins are swapped so that the transmit and receive connections on each DTE device are coordinated.
Q5. What are the features of RS422 ? What is the 802.11 Wireless LAN Standard?
RS422 is a differential balanced voltage interface. It permits data rates upto 10 MBaud over 40 feet or 100 KBaud over 4000 feet.
Output voltage – 2 to 6V
The 802.11 standard was the first attempt to define the way Information Technology— wireless data from a network should be sent. The standard Telecommunications and defines operations and interfaces at the MAC (Media Access Information Exchange between Systems— Control) and PHY (physical interface) levels in a TCP/IP Local and Metropolitan Area Network— network. There are three PHY layer interfaces defined (one Specific Requirements—Part 11: Wireless IR and two radio: Frequency-Hopping Spread Spectrum LAN Medium Access Control (MAC) and [FHSS] and Direct Sequence Spread Spectrum [DSSS]), and Physical Layer (PHY) Specifications the three do not interoperate. Use CSMA/CA (carrier sense multiple access with collision avoidance) as the basic medium access scheme for link sharing, phase-shift keying (PSK) for modulation.
Q6. What are the 2 types of Microprocessor architectures ?
Van Neumann Architecture- Single data bus used to fetch data & instructions. Program instructions & data are stored in a common main memory. When the controller addresses main memory it first fetches instruction & then the data to support the instruction. 2 separate fetches slows up the controller operation.
Harvard Architecture : Separate data & addresses bus. This allows execution to occur in parallel. As an execution is being prefetched current instruction is executing on data bus. Allows for faster execution.
Q7. What is the function of watch dog timer?
This provides a means of graceful recovery from a system problem. This could be a program that goes into an endless loop, or a hardware problem that prevents the program from operating correctly. If the program fails to reset the watchdog at some predetermined interval , a hardware reset will be initiated , but at least the system has a way to recover. This is specially useful for unattended systems.
Q8. What is the difference between a microprocessor & a microcontroller?
Apart from ALU microcontroller also has inbuilt memory, timers, I/O ports which a microprocessor does not.
In a 8 bit up 8 bits of data are read at a time, in a 32 & 64 bit one 32 & 64 bits of data are read at a time.
Q2 What are the modes of data transfer in ups?
Types of data transfer modes are
1) Synchronous mode
2) Asynchronous mode
3) Interrupt driven mode
In Asynchronous mode the MPU initiates data transfer by requesting the device to get ready & then goes on checking its status. This is known as handshaking mode of data transfer.
Synchronous mode is used for devices whose timing characteristics are known. In a synchronous transmission, there are no START or STOP bits appended to the data stream, and there is no idle period. As with asynchronous transmission the data rates on receiving and transmitting have to be in sync. However, unlike the separate clocks used in an asynchronous transfer, the devices involved in a synchronous transmission are synchronizing off one common clock that does not start and stop with each new frame (and on some boards there may be an entirely separate clock line for the serial interface to coordinate the transfer of bits). In some synchronous serial interfaces, if there is no separate clock line, the clock signal may even be transmitted along with the data bits.
The universal asynchronous receiver-transmitter (UART) is an example of a serial interface that does asynchronous serial transmission, whereas serial peripheral interface (SPI) is an example of a synchronous serial interface.
In Interrupt driven mode an interrupt is generated on the Interrupt line. The Interrupt service subroutine saves the processor status on the stack, completes the data transfer with the IO responsible for interrupt, restores the processor status & returns to the original program.
Q3. What is the function of 8251 chip?
8251 is a serial interface chip. USART(Universal Synchronous Asynchronous Receiver Transmitter) . It accepts parallel data from the USART, converts it into serial form according to specified format. At the same time it receives serial data & converts it to parallel form for the MPU.
Q4. What are the features of RS232C?
It is a commonly used serial communication interface for binary data interchange. It is a single ended, bipolar voltage unterminated circuit. A single wire carries the signal
+3 to +25V – Logic 0
-3 to -25V – Logic 1
Voltage levels are not TTL compatible. This needs separate voltage supplies for level conversion from TTL to RS232C & vice versa. ±12V supplies are used to get a reasonable threshold between high & low logic levels. Single ended unterminated configuration is susceptible to all forms of EMI. RS232C allows data interchange over short distances upto 50 feet. In Controller chip for Rs232C to TTL & TTL to RS232C conversion are required (MC1488, MC1489)
The core of the RS-232 specification is called the RS-232 interface (see Figure 4.9). The RS-232 interface defines the details of the serial port and the signals, along with some additional circuitry that maps signals from a synchronous serial interface (such as SPI) or an asynchronous serial interface (such as UART) to the serial port and by extension to the I/O device itself. By defining the details of the serial port, RS-232 also defines the transmission medium, which is the serial cable. The same RS-232 interface must exist on both sides of a serial communication transmission (DTE and DCE or embedded board and I/O device), connected by an RS-232 serial cable, in order for this scheme to work.
Two DTE devices can interconnect to each other using an internal wiring variation on serial
cables called null modem serial cables. Since DTE devices transmit and receive data on the
same pins, these null modem pins are swapped so that the transmit and receive connections on each DTE device are coordinated.
Q5. What are the features of RS422 ? What is the 802.11 Wireless LAN Standard?
RS422 is a differential balanced voltage interface. It permits data rates upto 10 MBaud over 40 feet or 100 KBaud over 4000 feet.
Output voltage – 2 to 6V
The 802.11 standard was the first attempt to define the way Information Technology— wireless data from a network should be sent. The standard Telecommunications and defines operations and interfaces at the MAC (Media Access Information Exchange between Systems— Control) and PHY (physical interface) levels in a TCP/IP Local and Metropolitan Area Network— network. There are three PHY layer interfaces defined (one Specific Requirements—Part 11: Wireless IR and two radio: Frequency-Hopping Spread Spectrum LAN Medium Access Control (MAC) and [FHSS] and Direct Sequence Spread Spectrum [DSSS]), and Physical Layer (PHY) Specifications the three do not interoperate. Use CSMA/CA (carrier sense multiple access with collision avoidance) as the basic medium access scheme for link sharing, phase-shift keying (PSK) for modulation.
Q6. What are the 2 types of Microprocessor architectures ?
Van Neumann Architecture- Single data bus used to fetch data & instructions. Program instructions & data are stored in a common main memory. When the controller addresses main memory it first fetches instruction & then the data to support the instruction. 2 separate fetches slows up the controller operation.
Harvard Architecture : Separate data & addresses bus. This allows execution to occur in parallel. As an execution is being prefetched current instruction is executing on data bus. Allows for faster execution.
Q7. What is the function of watch dog timer?
This provides a means of graceful recovery from a system problem. This could be a program that goes into an endless loop, or a hardware problem that prevents the program from operating correctly. If the program fails to reset the watchdog at some predetermined interval , a hardware reset will be initiated , but at least the system has a way to recover. This is specially useful for unattended systems.
Q8. What is the difference between a microprocessor & a microcontroller?
Apart from ALU microcontroller also has inbuilt memory, timers, I/O ports which a microprocessor does not.
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